James Bailey wrote:
> On Jun 10, 2005, at 4:44 PM, Christopher Smith wrote:
>> jdb wrote:
> Apple makes the claim here:
>
http://www.apple.com/g5processor/
>
> "[...]because Apple and IBM designed the PowerPC architecture to scale
> from 32- to 64-bit from the beginning."
>
> I'm too lazy to find a less marketing driven quote but I've read it many
> times.
Yeah, the actual reality is far different from that. The one bit of
truth is that when the PowerPC alliance was first formed, the roadmap
included the 601, 603, 604 and 620 processors. The 620 was designed to
be a 64-bit chip. Of course, by then all the major workstation chips had
roadmaps going to 64-bit as well, and much like the PowerPC folks, few
of them had actually figured out the engineering behind how they were
going to get there, let alone incorporated it in to their current designs.
The POWER architecture, however, was not designed for 64-bit from the
get go, and the PowerPC ISA was the POWER ISA, give or take a few
instructions.
The actual chip cores themselves were not designed with 64-bit support
either. The 620 was a completely different design from the 60x chips.
The biggest thing though, is that the 620 was a complete failure. First
of all, they defined a new set of instructions for the POWER/PowerPC ISA
to support 64-bit (it wasn't there from the get go). Then there was the
actual track record of the chip. There were three attempts made to bring
the 620 market. In each case, by the time the 620 was "done", it turned
out to be more expensive to make, ran slower, ran hotter, and had more
bugs than the 604. In the end it was abandoned. So much for the
advantages of having designed the architecure to scale to 64-bit "from
the beginning".
That being said, IBM did actually get 64-bit POWER architecture chips to
market in the form of the POWER3 and POWER4 series (and the specialized
RS64 series). I'm sure their experience with those processors made it
much easier to design and develop the G5.
In generally, planning something 15 years ahead of time in the chip
engineering business is rarely going to help you much anyway. By the
time the 15 years have passed, the whole market will have changed and
sticking with your engineering plan from 15 years ago is going to
prevent you from being able to take advantage of many of the lessons you
learned along the way.
Keep in mind the Itanium was engineered for the get go to be 64-bit, and
yet even with Intel's might behind it, it has been all but vanquished by
the x86-64 designs from AMD. Sometimes incremental stuff is actually
better, even if it makes us crazy to think we're still carrying baggage
from two decades ago.
>> The same is true with the G5. It runs all kernel space in 64-bit mode
>> (if you know a thing or two about programming you would run screaming
>> if you tried to imagine a kernel that switched between 32-bit and
>> 64-bit mode), with programs in user space running in a 32-bit
>> compatibility mode. The same is done with x86-64. If anything, the
>> transition to x86-64 is actually easier.
>
> I'm not up to speed on either PPC 64 bit nor x86-64. I hope you are
> right. I'm going to do a little investigation but I haven't yet. I
> haven't been keeping up with computer architecture much recently. The
> CPU is just not as important as it once was and I don't write kernel
> code or compilers. I haven't even written a device driver in 10 years.
>
> Thanks for the information.
I should clarify one thing. While the x86-64 supports the 64-bit
kernel/32-bit user space model (indeed, this is one of it's key selling
points), it isn't a requirement. I know lots of Linux folks using
Opterons who have almost everything 64-bit (up until recently MATLAB
wasn't available in for x86-64, so they used the 32-bit version instead).
--Chris